[libgens] Vdp: Use symbolic constants for register bits.
authorDavid Korth <gerbilsoft@gerbilsoft.com>
Thu, 31 Mar 2016 03:59:44 +0000 (23:59 -0400)
committerDavid Korth <gerbilsoft@gerbilsoft.com>
Thu, 31 Mar 2016 03:59:44 +0000 (23:59 -0400)
Other changes:

VdpPrivate::setReg():
- Reg.#01 (Mode Set 2): Check if M1 was changed. Previously, 0x8C
  was checked, which included 128K, M2, and M5, but not M1.
- Reg.#11 (Mode Set 3): Updated the comment to indicate the correct bit.

src/libgens/Vdp/Vdp.cpp
src/libgens/Vdp/VdpDma.cpp
src/libgens/Vdp/VdpIo.cpp
src/libgens/Vdp/VdpReg.cpp
src/libgens/Vdp/VdpRend_m4.cpp
src/libgens/Vdp/VdpRend_m5.cpp

index e9105b9..5a89eee 100644 (file)
@@ -292,7 +292,7 @@ void Vdp::updateVdpLines(bool resetCurrent)
 void Vdp::Check_NTSC_V30_VBlank(void)
 {
        // TODO: Only do this in Mode 5, and maybe Mode 4 if SMS2 is in use.
-       if (d->Reg_Status.isPal() || !(d->VDP_Reg.m5.Set2 & 0x08)) {
+       if (d->Reg_Status.isPal() || !(d->VDP_Reg.m5.Set2 & VDP_REG_M5_SET2_M2)) {
                // Either we're in PAL mode, where V30 is allowed, or V30 isn't set.
                // VBlank is always OK.
                // TODO: Clear the NTSC V30 offset?
index 71b3651..04b9a1a 100644 (file)
@@ -600,7 +600,7 @@ unsigned int Vdp::updateDMA(void)
 
        // Check if we're in VBlank or if the VDP is disabled.
        if (VDP_Lines.currentLine >= VDP_Lines.totalVisibleLines ||
-           (!(d->VDP_Reg.m5.Set2 & 0x40)))
+           (!(d->VDP_Reg.m5.Set2 & VDP_REG_M5_SET2_DISP)))
        {
                // In VBlank, or VDP is disabled.
                offset |= 1;
index 25da2bb..bd3d851 100644 (file)
@@ -68,7 +68,7 @@ namespace LibGens {
  */
 uint8_t Vdp::Int_Ack(void)
 {
-       if ((d->VDP_Reg.m5.Set2 & 0x20) && (d->VDP_Int & 0x08))
+       if ((d->VDP_Reg.m5.Set2 & VDP_REG_M5_SET2_IE0) && (d->VDP_Int & 0x08))
        {
                // VBlank interrupt acknowledge.
                d->VDP_Int &= ~0x08;
@@ -98,11 +98,11 @@ void Vdp::updateIRQLine(int interrupt)
        d->VDP_Int |= interrupt;
 
        // TODO: HBlank interrupt should take priority over VBlank interrupt.
-       if ((d->VDP_Reg.m5.Set2 & 0x20) && (d->VDP_Int & 0x08)) {
+       if ((d->VDP_Reg.m5.Set2 & VDP_REG_M5_SET2_IE0) && (d->VDP_Int & 0x08)) {
                // VBlank interrupt.
                M68K::Interrupt(6, -1);
                return;
-       } else if ((d->VDP_Reg.m5.Set1 & 0x10) && (d->VDP_Int & 0x04)) {
+       } else if ((d->VDP_Reg.m5.Set1 & VDP_REG_M5_SET1_IE1) && (d->VDP_Int & 0x04)) {
                // HBlank interrupt.
                M68K::Interrupt(4, -1);
                return;
@@ -240,7 +240,7 @@ uint16_t Vdp::readCtrlMD(void)
        d->VDP_Ctrl.ctrl_latch = 0;
 
        // If the Display is disabled, set the VBlank flag.
-       if (d->VDP_Reg.m5.Set2 & 0x40)
+       if (d->VDP_Reg.m5.Set2 & VDP_REG_M5_SET2_DISP)
                return status;
        else
                return (status | VdpStatus::VDP_STATUS_VBLANK);
@@ -524,8 +524,8 @@ void Vdp::writeCtrlMD(uint16_t ctrl)
         * first control word is processed. They are replaced
         * when the second control word is processed.
         *
-        * NOTE 2: CD5 is only updated if DMA Enabled == 1.
-        * (VDP_Reg.m5.Set2 & 0x10)
+        * NOTE 2: CD5 is only updated if M1 (DMA) == 1.
+        * (VDP_Reg.m5.Set2 & VDP_REG_M5_SET2_M1)
         *
         * NOTE 3: A16 is only used if 128 KB mode is enabled.
         */
@@ -542,7 +542,7 @@ void Vdp::writeCtrlMD(uint16_t ctrl)
        // Update the VDP access code register: CD(4..2)
        d->VDP_Ctrl.code &= ~0x1C;
        d->VDP_Ctrl.code |= ((ctrl >> 2) & 0x1C);
-       if (d->VDP_Reg.m5.Set2 & 0x10) {
+       if (d->VDP_Reg.m5.Set2 & VDP_REG_M5_SET2_M1) {
                // DMA is enabled. Update CD5.
                d->VDP_Ctrl.code &= ~VdpTypes::CD_DMA_ENABLE;
                d->VDP_Ctrl.code |= ((ctrl >> 2) & VdpTypes::CD_DMA_ENABLE);
index 0922931..e550861 100644 (file)
@@ -41,11 +41,11 @@ void VdpPrivate::updateVdpMode(void)
        // this mode was not present in the original TMS9918,
        // and was added in the TMS9918A.
        VDP_Mode = (VdpTypes::VDP_Mode_t)
-                  (((Set2 & 0x10) >> 4) |      // M1 (Text)
-                   ((Set2 & 0x08) >> 2) |      // M2 (Multicolor)
-                   ((Set1 & 0x02) << 1) |      // M3 (Graphic II)
-                   ((Set1 & 0x04) << 1) |      // M4/PSEL
-                   ((Set2 & 0x04) << 2));      // M5
+                  (((Set2 & VDP_REG_M5_SET2_M1) >> 4) |        // M1 (Text)
+                   ((Set2 & VDP_REG_M5_SET2_M2) >> 2) |        // M2 (Multicolor)
+                   ((Set1 & VDP_REG_M5_SET1_M3) << 1) |        // M3 (Graphic II)
+                   ((Set1 & VDP_REG_M5_SET1_M4) << 1) |        // M4/PSEL
+                   ((Set2 & VDP_REG_M5_SET2_M5) << 2));        // M5
 
        // If the VDP mode has changed, CRam needs to be updated.
        if (prevVdpMode != VDP_Mode) {
@@ -154,10 +154,10 @@ void VdpPrivate::updateVdpAddrCache_m5(unsigned int updateMask)
                Spr_Gen_Addr = 0;
        } else {
                // TODO: Cache ScrA_A16?
-               const uint32_t ScrA_A16 = ((VDP_Reg.m5.Pat_Data_Adr & 0x01) << 16);
+               const uint32_t ScrA_A16 = ((VDP_Reg.m5.Pat_Data_Adr & VDP_REG_M5_PAT_DATA_PA16) << 16);
                ScrA_Gen_Addr = ScrA_A16;
                if (ScrA_A16) {
-                       ScrB_Gen_Addr = ((VDP_Reg.m5.Pat_Data_Adr & 0x10) << 12);
+                       ScrB_Gen_Addr = ((VDP_Reg.m5.Pat_Data_Adr & VDP_REG_M5_PAT_DATA_PB16) << 12);
                }
                Spr_Gen_Addr = ((VDP_Reg.m5.Spr_Pat_Adr & 0x20) << 11); // Update the Window and Sprite Attribute Table base addresses.
        }
@@ -276,8 +276,8 @@ void VdpPrivate::setReg(int reg_num, uint8_t val)
                case 0: // Mode Set 1
                        q->updateIRQLine(0);
 
-                       if (diff & 0x06) {
-                               // PSEL and/or M3 have changed.
+                       if (diff & (VDP_REG_M5_SET1_M4 | VDP_REG_M5_SET1_M3)) {
+                               // M4/PSEL and/or M3 have changed.
                                // TODO: Handle them separately?
                                updateVdpMode();
                                updateVdpAddrCache_m5(1);
@@ -285,8 +285,12 @@ void VdpPrivate::setReg(int reg_num, uint8_t val)
                        break;
 
                case 1: // Mode Set 2
-                       if (diff & 0x8C) {
-                               // VRAM, M1, M2, and/or M5 have changed.
+                       if (diff & (VDP_REG_M5_SET2_128K |
+                                   VDP_REG_M5_SET2_M1 |
+                                   VDP_REG_M5_SET2_M2 |
+                                   VDP_REG_M5_SET2_M5))
+                       {
+                               // 128K, M1, M2, and/or M5 have changed.
                                updateVdpMode();
                        }
                        // TODO: If emulating TMS9918A, and VRAM bit has changed,
@@ -345,10 +349,10 @@ void VdpPrivate::setReg(int reg_num, uint8_t val)
                        // Mode Set 3.
                        static const uint8_t H_Scroll_Mask_Table[4] = {0x00, 0x07, 0xF8, 0xFF};
 
-                       // Check the Vertical Scroll mode. (Bit 3)
+                       // Check the Vertical Scroll mode. (Bit 2)
                        // 0: Full scrolling. (Mask == 0)
                        // 1: 2CELL scrolling. (Mask == 0x7E)
-                       V_Scroll_MMask = ((val & 4) ? 0x7E : 0);
+                       V_Scroll_MMask = ((val & VDP_REG_M5_SET3_VSCR) ? 0x7E : 0);
 
                        // Horizontal Scroll mode
                        H_Scroll_Mask = H_Scroll_Mask_Table[val & 3];
@@ -360,7 +364,7 @@ void VdpPrivate::setReg(int reg_num, uint8_t val)
                        // Mode Set 4.
                        if (diff & 0x08) {
                                // Update the Shadow/Highlight setting.
-                               palette.setMdShadowHighlight(!!(VDP_Reg.m5.Set4 & 0x08));
+                               palette.setMdShadowHighlight(!!(VDP_Reg.m5.Set4 & VDP_REG_M5_SET4_STE));
                        }
                        if (diff & 0x81) {
                                // H32/H40 mode has changed.
@@ -384,10 +388,10 @@ void VdpPrivate::setReg(int reg_num, uint8_t val)
                        } else {
                                // 128 KB mode.
                                // TODO: Cache ScrA_A16?
-                               const uint32_t ScrA_A16 = ((VDP_Reg.m5.Pat_Data_Adr & 0x01) << 16);
+                               const uint32_t ScrA_A16 = ((VDP_Reg.m5.Pat_Data_Adr & VDP_REG_M5_PAT_DATA_PA16) << 16);
                                ScrA_Gen_Addr = ScrA_A16;
                                if (ScrA_A16) {
-                                       ScrB_Gen_Addr = ((VDP_Reg.m5.Pat_Data_Adr & 0x10) << 12);
+                                       ScrB_Gen_Addr = ((VDP_Reg.m5.Pat_Data_Adr & VDP_REG_M5_PAT_DATA_PB16) << 12);
                                }
                        }
                        break;
index bec498f..b3557fd 100644 (file)
@@ -57,7 +57,7 @@ FORCE_INLINE unsigned int VdpPrivate::Update_Sprite_Line_Cache_m4(int line)
 
        const int screen_h = 192;       // TODO: 224, 240?
        // Sprite height. (8x8 or 8x16, depending on reg1)
-       int sprite_h = 8 + ((VDP_Reg.m4.Set2 & 0x02) << 2);
+       int sprite_h = 8 + ((VDP_Reg.m4.Set2 & VDP_REG_M4_SET2_SIZE) << 2);
        // Sprite zoom flag.
        // - SMS1: All 8 sprites can be zoomed vertically;
        //         only first 4 sprites can be zoomed horizontally.
@@ -65,7 +65,7 @@ FORCE_INLINE unsigned int VdpPrivate::Update_Sprite_Line_Cache_m4(int line)
        // - MD(PBC): No sprites can be zoomed at all.
        uint8_t sprite_zoom = 0;
        if (VDP_Model < VdpTypes::VDP_MODEL_MD_PBC) {
-               sprite_zoom = (VDP_Reg.m4.Set2 & 0x01);
+               sprite_zoom = (VDP_Reg.m4.Set2 & VDP_REG_M4_SET2_MAG);
        }
 
        const uint8_t *spr_VRam = &VRam.u8[Spr_Tbl_Addr];
index 3b5836e..2c292f5 100644 (file)
@@ -797,7 +797,7 @@ FORCE_INLINE void VdpPrivate::T_Render_Line_ScrollA_Window(void)
        // Check if the entire line is part of the window.
        // TODO: Verify interlaced operation!
        const unsigned int vdp_cells = (q->VDP_Lines.currentLine >> 3);
-       if (VDP_Reg.m5.Win_V_Pos & 0x80) {
+       if (VDP_Reg.m5.Win_V_Pos & VDP_REG_M5_WIN_V_DOWN) {
                // Window starts from the bottom.
                if (vdp_cells >= Win_Y_Pos) {
                        // Current line is >= starting line.
@@ -818,7 +818,7 @@ FORCE_INLINE void VdpPrivate::T_Render_Line_ScrollA_Window(void)
 
        if (Win_Length == 0) {
                // Determine the cell starting position and length.
-               if (VDP_Reg.m5.Win_H_Pos & 0x80) {
+               if (VDP_Reg.m5.Win_H_Pos & VDP_REG_M5_WIN_H_RIGT) {
                        // Window is right-aligned.
                        ScrA_Start = 0;
                        ScrA_Length = Win_X_Pos;
@@ -1265,7 +1265,7 @@ FORCE_INLINE void VdpPrivate::T_Render_Line_m5(void)
        // Clear the line first.
        memset(&LineBuf, (h_s ? LINEBUF_SHAD_B : 0), sizeof(LineBuf));
 
-       if (VDP_Reg.m5.Set3 & 0x04) {
+       if (VDP_Reg.m5.Set3 & VDP_REG_M5_SET3_VSCR) {
                // 2-cell VScroll.
                T_Render_Line_Scroll<false, interlaced, true, h_s>(0, H_Cell);  // Scroll B
                T_Render_Line_ScrollA_Window<interlaced, true, h_s>();          // Scroll A
@@ -1377,7 +1377,7 @@ void VdpPrivate::renderLine_m5(void)
 
        // TODO: This check needs to be optimized.
        if (lineNum == (q->VDP_Lines.totalDisplayLines - 1) &&
-           (VDP_Reg.m5.Set2 & 0x40))
+           (VDP_Reg.m5.Set2 & VDP_REG_M5_SET2_DISP))
        {
                // Clear the sprite dot overflow variable.
                // (TODO: Is this correct?)
@@ -1411,7 +1411,7 @@ void VdpPrivate::renderLine_m5(void)
 
        // Determine the starting line in MD_Screen.
        if (Reg_Status.isNtsc() &&
-           (VDP_Reg.m5.Set2 & 0x08) &&
+           (VDP_Reg.m5.Set2 & VDP_REG_M5_SET2_M2) &&
            q->options.ntscV30Rolling)
        {
                // NTSC V30 mode. Simulate screen rolling.
@@ -1440,7 +1440,7 @@ void VdpPrivate::renderLine_m5(void)
        }
 
        // Check if the VDP is enabled.
-       if (!(VDP_Reg.m5.Set2 & 0x40) || in_border) {
+       if (!(VDP_Reg.m5.Set2 & VDP_REG_M5_SET2_DISP) || in_border) {
                // VDP is disabled, or this is the border region.
                // Clear the line buffer.
 
@@ -1454,8 +1454,8 @@ void VdpPrivate::renderLine_m5(void)
                // VDP is enabled.
 
                // Determine how to render the image.
-               int RenderMode = ((VDP_Reg.m5.Set4 & 0x08) >> 2);       // Shadow/Highlight
-               RenderMode |= !!im2_flag;                               // Interlaced.
+               int RenderMode = ((VDP_Reg.m5.Set4 & VDP_REG_M5_SET4_STE) >> 2);        // Shadow/Highlight
+               RenderMode |= !!im2_flag;                                               // Interlaced.
                switch (RenderMode & 3) {
                        case 0:
                                // H/S disabled; normal display.
@@ -1506,7 +1506,7 @@ void VdpPrivate::renderLine_m5(void)
                uint16_t *lineBuf16 = q->MD_Screen->lineBuf16(lineNum);
                T_Render_LineBuf<uint16_t>(lineBuf16, palette.m_palActive.u16);
 
-               if (VDP_Reg.m5.Set1 & 0x20) {
+               if (VDP_Reg.m5.Set1 & VDP_REG_M5_SET1_LCB) {
                        // SMS left-column blanking bit is set.
                        // FIXME: Should borderColorEmulation apply here?
                        T_Apply_SMS_LCB<uint16_t>(lineBuf16, 
@@ -1516,7 +1516,7 @@ void VdpPrivate::renderLine_m5(void)
                uint32_t *lineBuf32 = q->MD_Screen->lineBuf32(lineNum);
                T_Render_LineBuf<uint32_t>(lineBuf32, palette.m_palActive.u32);
 
-               if (VDP_Reg.m5.Set1 & 0x20) {
+               if (VDP_Reg.m5.Set1 & VDP_REG_M5_SET1_LCB) {
                        // SMS left-column blanking bit is set.
                        // FIXME: Should borderColorEmulation apply here?
                        T_Apply_SMS_LCB<uint32_t>(lineBuf32, 
@@ -1793,7 +1793,7 @@ void VDP_Render_Line_m5_32X(void)
                VDP_Flags.VRam_Spr = 0;
 
                // Determine how to render the image.
-               const int RenderMode = ((VDP_Reg.m5.Set4 & 0x08) >> 2) | VDP_Reg.Interlaced.DoubleRes;
+               const int RenderMode = ((VDP_Reg.m5.Set4 & VDP_REG_M5_SET4_STE) >> 2) | VDP_Reg.Interlaced.DoubleRes;
                switch (RenderMode & 3) {
                        case 0:
                                // H/S disabled; interlaced disabled.
@@ -1820,7 +1820,7 @@ void VDP_Render_Line_m5_32X(void)
        // Check if the palette was modified.
        if (VDP_Flags.CRam) {
                // Update the palette.
-               if (VDP_Reg.m5.Set4 & 0x08)
+               if (VDP_Reg.m5.Set4 & VDP_REG_M5_SET4_STE)
                        VDP_Update_Palette_HS();
                else
                        VDP_Update_Palette();